ST公司重定位向量表的库函数：

void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)

{ 

  assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));

  assert_param(IS_NVIC_OFFSET(Offset));  

  SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);

}

其中NVIC_VectTab要么是FLASH要么是RAM的起始位置，Offset: Vector Table base offset field. This value must be a multiple of 0x200，这里先是IS_NVIC_OFFSET(OFFSET)  ((OFFSET) < 0x000FFFFF)断言机制，ST公司技术支持给我的回信是这么说的“The max flash size is 1MB, that is 0x100000, so the vector table must be placed within this address range, so ((OFFSET) < 0x000FFFFF) is checked.”f10x 内置flash最大也就512K，SRAM内置是64k，并没有看到官方人员说的1MB，我想这些断言机制恐怕也是为了给很多芯片共同使用而写的，也就是说实际还是要自己小心着用啊~

然后(Offset & (uint32_t)0x1FFFFF80)事实上就是取了Offset的[28：7]位。但是你还是需要人为让其为0x200的倍数，至于为什么，

在ARM官方给出的Cortex-m3 technial reference manul中是这么说的：

The Vector Table Offset Register positions the vector table in CODE or SRAM space. 

The default, on reset, is 0 (CODE space). When setting a position, the offset must be 

aligned based on the number of exceptions in the table. This means that the minimal 

alignment is 32 words that you can use for up to 16 interrupts. For more interrupts, you 

must adjust the alignment by rounding up to the next power of two. For example, if you 

require 21 interrupts, the alignment must be on a 64-word boundary because table size 

is 37 words, next power of two is 64.

所以由于人家规定要对齐向量表，由于stm32的中断向量一共有68+16=84个，应该把这个数增加到下一个2的整数倍即128，然后换算成地址范围128*4=512，就得到了0x200。