TI公司的TMS320F28xx和F28xxx数字信号控制器(DSC)具有较高的32位CPU性能(CPU时钟高达150MHZ)和集成了很多高速的外设,能直接连接到板内的ADC的模拟信号.内核电压1.9V,I/O电压3.3V.本文介绍了TMS320F28xx和F28xxx的主要性能以及硬件特性 。
TMS320F2833x, TMS320F2823x DSCs
DIGITAL signal processing (DSP) DEVICES currently have higher CPU performance (clock rates over 100 MHz) and integration of ADVANCED high-speed peripherals. Great strides have been made in DSP power reduction through CMOS process technology. These advances have increased the complexity of the DSP board design, which provide more ANALOG challenges than a simple digital design. Some of the examples of these challenges are: board traces can become transmission lines, floating unused device pins can consume unnecessary power, and different core and INPUT/OUTPUT (I/O) voltages need power management techniques.
The TMS320F28xx and TMS320F28xxx are members of the C2000™ DSP generation used for embedded CONTROL applications. The current PRODUCTS run at a CPU frequency up to 150 MHz; FUTURE devices in the family may push this frequency upwards. The CPU frequencies of these devices fall in the radio frequency range. There is also a need to create a design that is debug friendly. How can designers access pins on the Ball Grid Array (BGA) packages? What can SYSTEM designers do at the design stage to help isolate pieces of the board for debug? And even after the board design is completed, there is a
need to have a methodical approach for system debug TMS320F28xx/F28xxx devices include various onboard peripheral blocks. Though these peripherals save adding external INTERFACE parts and make it flexible to meet the system level requirements for different applications, it is challenging to design the HARDWARE to operate all these peripherals and the DSC to achieve the highest performance with optimum reliability. Therefore, designing a CUSTOM board, which should work as desired on the first attempt, is a real challenge.
With the CPU frequency up to 150 MHz, there are many internal functional blocks onboard operating at various frequencies. Any signal above 10 MHz can create a signal integrity issue if proper care is not taken during schematics and layout design. In addition, there are low-level analog signals on the same board. EMI/EMC and electrical noise issues should be considered before starting the board design.
TMS320F28xx主要特性:
High-Performance Static CMOS Technology
Up to 150 MHz (6.67-ns Cycle Time)
1.9-V Core, 3.3-V I/O Design
High-Performance 32-Bit CPU (TMS320C28x)
IEEE-754 Single-Precision Floating-Point Unit (FPU)
16 x 16 and 32 x 32 MAC Operations
16 x 16 Dual MAC
Harvard Bus Architecture
Fast Interrupt Response and Processing
Unified MEMORY PROGRAMMING Model
Code-Efficient (in C/C++ and Assembly)
Six Channel DMA CONTROLLER (for ADC, McBSP, XINTF, and SARAM)
16-bit or 32-bit External Memory Interface (XINTF)
Over 2M x 16 Address Reach
On-Chip Memory
F28335/F28235: 256K x 16 Flash, 34K x 16 SARAM
F28334/F28234: 128K x 16 Flash, 34K x 16 SARAM
F28332/F28233: 64K x 16 Flash, 26K x 16 SARAM
1K x 16 OTP ROM
Boot ROM (8K x 16)
With SOFTWARE Boot Modes (via SCI, SPI, CAN, I2C, McBSP, XINTF, and Parallel I/O)
STANDARD Math Tables
Clock and System Control
DYNAMIC PLL Ratio Changes Supported
On-Chip Oscillator
Watchdog Timer MODULE
GPIO0 to GPIO63 Pins Can Be Connected to One of the Eight External Core Interrupts
Peripheral Interrupt Expansion (PIE) Block That Supports All 58 Peripheral Interrupts
128-Bit SECURITY Key/Lock
Protects Flash/OTP/RAM Blocks
Prevents Firmware REVERSE ENGINEERING
Enhanced Control Peripherals
Up to 18 PWM Outputs
Up to 6 HRPWM Outputs With 150 ps MEP Resolution
Up to 6 Event Capture Inputs
Up to 2 Quadrature Encoder Interfaces
Up to 8 32-bit/Six 16-bit Timers
Three 32-Bit CPU Timers
Serial Port Peripherals
Up to 2 CAN MODULES
Up to 3 SCI (UART) Modules
Up to 2 McBSP Modules (Configurable as SPI)
One SPI Module
One Inter-Integrated-Circuit (I2C) Bus
12-Bit ADC, 16 Channels
80-ns Conversion Rate
2 x 8 Channel Input Multiplexer
Two Sample-and-Hold
Single/Simultaneous Conversions
Internal or External Reference
Up to 88 Individually Programmable, Multiplexed GPIO Pins With Input Filtering
JTAG Boundary Scan Support (1)
Advanced Emulation Features
Analysis and Breakpoint Functions
Real-Time Debug via Hardware
Development Support Includes
ANSI C/C++ Compiler/Assembler/Linker
Code Composer Studio IDE
DSP/BIOS
Digital Motor Control and Digital Power Software Libraries
Low-Power Modes and Power Savings
IDLE, STANDBY, HALT Modes Supported
Disable Individual Peripheral Clocks
Package Options
LEAD-FREE Green Packaging
Thin Quad Flatpack (PGF)
MicroStar BGA (ZHH)
Plastic BGA (ZJZ)
Temperature Options:
A: -40°C to 85°C (PGF, ZHH, ZJZ)
S: -40°C to 125°C (ZJZ)
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