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MSP430F149的ADC12模块

发布时间:2020-08-31 发布时间:
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1 概述

MSP430F149的ADC12为SAR型12位AD,共有16路输入通道,其中8路独立的外部输入通道,2路接外部Vref+,Vref-,3路内部通道可分别测内部温度传感器、AVCC、和外部参考源。

P6口第二功能为AD输入端。MSP430F149的10、11分别接外部电压参考源正负极,7脚可将内部电压参考源输出。

ADC12共有18个中断源,公用一个中断向量ADC12_VECTOR。

AD的参考源可选择内部电压参考源或外部电压参考源。内部电压参考源有1.5V,2.5V可选,使用时向ADC12CTL0写入REFON+ REF2_5V就打开了2.5V。外部电压参考源由REF+接入。上电时若不设置参考源,则参考源为系统供电电压3.3V。

2 使用方法概述

2.1程序架构

中断方式

1、设置 ADC12工作模式,启动转换,开全局中断,等待中断

2、写中断处理函数

查询方式

设置ADC12工作模式,启动转换,查询中断标志ADC12IFG

while (!(0x01 & ADC12IFG));转换完毕读取采样值,系统自动清除中断标志

2.2 使用概述

主要参数配置

设置工作方式:sing\sequence\re-sing\re-sequencd;

设置转换时间:SHTX

设置触发方式:ADC12SC\MSC\TimerA\ TimerB

设置通道:外部通道\内部Temperature sensor

设置参考源:系统电压\内部参考源\外部参考源

其他细节配置

一般要配置采样转换模式为脉冲(SHP),打开ADC12(ADC12ON),使能ADC12转换(ENC),使能中断(如果采取中断模式),触发转换(若采用ADC12SC触发)。

解释

ADC12模数转换是在SHI的上升沿初始化的。SHI信号有四个来源: The ADC12SC bit;The Timer_A Output Unit 1; The Timer_B Output Unit 0; The Timer_B Output Unit 1。故单次采样时只需要每次设置ADC12CTL0 |= ADC12SC就采样一次;重复采样时,如Rep-sing,设置ADC12CTL1 = SHS_1 +CONSEQ_2就选择了Rep-sing模式,每次采样通过定时器A触发。

3 相关寄存器

1、ADC12CTL0

SHT1x Bits

Sample-and-hold time. These bits define the number of ADC12CLK cycles in

the sampling period for registers ADC12MEM8 to ADC12MEM15.

SHT0x Bits

Sample-and-hold time. These bits define the number of ADC12CLK cycles in

the sampling period for registers ADC12MEM0 to ADC12MEM7.

ADC12ON

0 ADC12 off

1 ADC12 on

ENC

ENC Bit 1 Enable conversion

0 ADC12 disabled

1 ADC12 enabled

ADC12SC Bit 0 Start conversion. Software-controlled sample-and-conversion start.

ADC12SC and ENC may be set together with one instruction. ADC12SC is

reset automatically.

0 No sample-and-conversion-start

1 Start sample-and-conversion

MSC Bit 7 Multiple sample and conversion. Valid only for sequence or repeated modes.

0 The sampling timer requires a rising edge of the SHI signal to trigger

each sample-and-conversion.

1 The first rising edge of the SHI signal triggers the sampling timer, but

further sample-and-conversions are performed automatically as soon

as the prior conversion is completed.

2、ADC12CTL1

SHP

SHP Bit 9 Sample-and-hold pulse-mode select. This bit selects the source of the

sampling signal (SAMPCON) to be either the output of the sampling timer or

the sample-input signal directly.

0 SAMPCON signal is sourced from the sample-input signal.

1 SAMPCON signal is sourced from the sampling timer.

SHSx Bits

11-10

Sample-and-hold source select

00 ADC12SC bit

01 Timer_A.OUT1

10 Timer_B.OUT0

11 Timer_B.OUT1

CONSEQx Bits

2-1

Conversion sequence mode select

00 Single-channel, single-conversion

01 Sequence-of-channels

10 Repeat-single-channel

11 Repeat-sequence-of-channels

3、ADC12IE

ADC12IEx Bits

15-0

Interrupt enable. These bits enable or disable the interrupt request for the ADC12IFGx bits.

0 Interrupt disabled

1 Interrupt enabled

4、ADC12IFG

ADC12IFGx Bits

15-0

ADC12MEMx Interrupt flag. These bits are set when corresponding

ADC12MEMx is loaded with a conversion result. The ADC12IFGx bits are

reset if the corresponding ADC12MEMx is accessed, or may be reset with

software.

0 No interrupt pending

1 Interrupt pending

5、ADC12MCTLX

SREFx Bits

6-4

Select reference

000 VR+ = AVCC and VR− = AVSS

001 VR+ = VREF+ and VR− = AVSS

010 VR+ = VeREF+ and VR− = AVSS

011 VR+ = VeREF+ and VR− = AVSS

100 VR+ = AVCC and VR− = VREF−/ VeREF−

101 VR+ = VREF+ and VR− = VREF−/ VeREF−

110 VR+ = VeREF+ and VR− = VREF−/ VeREF−

111 VR+ = VeREF+ and VR− = VREF−/ VeREF−

INCHx Bits

3-0



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